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    Please use this identifier to cite or link to this item: http://140.128.103.80:8080/handle/310901/10371


    Title: 多核心嵌入式軟體之模型驅動整合開發環境-VMC---總計畫(I)
    Other Titles: Embedded Software Engineering(I)
    Authors: 朱正忠,楊朝棟,薛念林,孔崇旭,石志雄,張志宏,熊博安
    Contributors: 行政院國家科學委員會
    東海大學資訊工程與科學系
    Keywords: 多核心架構;嵌入式軟體;排程;驗證;程式碼生成;任務遷移
    Multi-core architecture; Embedded Software; Scheduling; Verification; CodeGeneration; Task Migration
    Date: 2009
    Issue Date: 2011-07-25T01:16:40Z (UTC)
    Abstract: 多核心程式撰寫已經?是一種奢望,而是一種必須具備的能?因為即使是嵌入式微處?器也逐漸具有多顆核心架構。然而, 現有的技術?如OpenMP 及Intel ThreadingBuilding Block (TBB)程式庫皆?夠使用者友善,因為嵌入式軟體工程師需要耗費相當多的時間與功夫設計及除錯多核心程式。目前,提升嵌入式軟體設計的抽象層級是一個具有潛?的方法解決上述問題。?用統一塑模語言(UML)的模型驅動架構(MDA)設計,在傳統的單顆處?器程式撰寫的生產?與正確性已經有顯著提升的效果。但是,我們仍未看?多核的MDA 方法。有鑑於我們所發展的『可驗證嵌入式即時軟體應用框架』(VERTAF)的成功,已經?積相當多的專業經驗,總計畫將提出一套VERTAF 的多核版本,簡稱VMC (VERTAF/Multi-Core)。VMC 為一針對多核心嵌入式架構之整合性軟體開發環境,開發者可藉由本環境以SymML 描述其系統需求,以UML 標準符號塑模其系統設計,並將該設計套用樣式結構自動轉換為?高品質的設計,透過優?的設計模型自動產生程式碼,最後並可對程式碼加以測試。因此,本系統具下?優點:(1)支援多核架構嵌入式軟體之設計與驗證;(2)提供一個整合性的開發環境;(3)因本環境乃基於UML 標準所建構,所以?與目前既有之UML 開發工具整合;(4)支援既有之多核架構開發函式庫,如:OpenMP 以及Intel Threading Building Blocks。總計畫將包含七項子計畫:子計畫一以SysML 為基礎之多核心嵌入式系統需求塑模環境,子計畫二支援多核心嵌入式軟體設計之多重觀點整合模型與可再用元件庫,子計畫三多核心嵌入式軟體設計之設計支援系統,子計畫四多核心嵌入式軟體之合成與程式碼生成,子計畫五多核心嵌入式軟體設計工具系統之架構支援,子計畫?多核心嵌入式軟體設計工具系統之平?程式優化支援,以及子計畫七多核心嵌入式軟體設計之測試支援系統。每一個子系統將會在各項子計畫下設計並開發完成,而總計畫將會著重於整體架構設計與專案管?。在第一?的計畫中,我們已?續完成VMC 系統雛形的設計,並定期的基於各種效能考?確認架構的正確性。此外,總計畫方面也持續進?構型管?、專案控管、專案品質保證以及測試計畫等用途。在第二?,我們將持續完成後續相關子系統,所有的專案管?工作也會如一般性工作的執?,以確保?低所有可能發生的風險、追蹤所有的討?議題,以及控管專案的開發進?。此外,?仔細的測試設計與測試資?也會被建?。第三?,總計畫會著重於產品整合。整合計畫中會包含整合準則、整合順序以及整合環境的建?。於環境整合後,我們將會把該系統應用於手機平台以驗證我們的方法與系統,也會蒐集效能資?與缺陷資訊作為日後改善的依據。
    Multi-core programming is no more a luxury; it is now a necessity because even embedded processors are becoming multi-core. However, the state-of-the-art techniques such as OpenMP and the Intel Threading Building Block (TBB) library are far from user-friendly due to the tedious work needed in explicitly designing multi-core programs and debugging. At the present days, a solution for problem those we talked above will be that to enhance the abstract level of embedded software design. Using the model driven architecture (MDA) design in UML, we saw a significantly improvement on productivity and accuracy of traditional single core programming. Nevertheless, we still not discover a MDA solution for Multi-core. By leveraging on the expertise gained from Verifiable Embedded Real-Time Application Framework (VERTAF), we’ve learned lots amounts of professional experience, the main project plans to propose a Multi-Core version of VERTAF, called VERTAF/ Multi-core (VMC in short). VMC is an integrated development environment for multi-core embedded software architecture. Developers would be able to describe their system requirements with SymML by using this environment, modeling their design with UML standard notation, automatically applying their design into a pattern structure for a high quality one, generate source code through a well-designed model; finally we can test the code. Therefore, The benefits of our system are: (1) supporting multi-core embedded software design and verification; (2) providing an integrated develop environment; (3) easily integrated with other existing UML tools since it is built on UML standards; (4) supporting current multi-core architecture developing libraries such as OpenMP and Intel Threading Building Blocks. The main project consists of seven subprojects. Subproject 1 will be the SysML based Multi-Core Embedded System Modeling Environment, subproject 2 is Multi-View Integration Model and Reusable Component Base support Multi-core embedded software design, subproject 3 constructing a system which supporting Multi-core embedded software design, subproject 4 will be the multi-core embedded software integration and code generation, subproject 5 building up an architecture supporting multi-core embedded software design tool system, subproject 6 plays a role that optimize the parallel program of multi-core embedded software design tool system, and the subproject 7 is testing supported system for multi-core embedded software design. In the second year, we will finish the remaining part of related sub-system as our target, to insure that reducing the risk maybe probably happened, and trace all the issue we have discussed, also take control on project development progress. Beside, the more detail testing design and testing data will be build up. In the third year, the main project will focus on product integration. An integration plan, including the integration criteria, sequence and environment is established. After the environment integration, we will apply our system with a mobile platform to verify our approach and system. Performance data and defect information will be collected as a basis for further improvement.
    Relation: 研究編號:NSC98-2220-E029-001
    研究期間:2009-08~ 2010-07
    Appears in Collections:[資訊工程學系所] 國科會研究報告

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