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Please use this identifier to cite or link to this item:
http://140.128.103.80:8080/handle/310901/21674
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| Title: | 0.18 μm BCD technology platform with best-in-class 6 V to 70 V power MOSFETs |
| Authors: | Chou, H.-L.,?Su, P.C.,?Ng, J.C.W.,?Wang, P.L.,?Lu, H.T.,?Lee, C.J.,?Syue, W.J.,?Yang, S.Y.,?Tseng, Y.C.,?Cheng, C.C.,?Yao, C.W.,?Liou, R.S.a,?Jong, Y.C.a,?Tsai, J.L.,?Cai, J.,?Tuan, H.C.,?Huang, C.-F.,?Gong, J. |
| Contributors: | Department of Electrical Engineering, Tunghai University |
| Keywords: | BCD technology;Current enhancement;High voltage;Isolated LDMOS;LDMOS devices;Operating voltage;Power devices;Power Mosfets;Saturation region;Specific-on-resistance |
| Date: | 2012-06-03 |
| Issue Date: | 2013-05-15T09:04:09Z (UTC)
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| Publisher: | Bruges; Belgium |
| Abstract: | This paper presents a single BCD technology platform with high performance power devices at a wide range of operating voltages. The platform offers 6 V to 70 V LDMOS devices. All devices offer best-in-class specific on-resistance of 20 to 40 % lower than that of the state-of-the-art IC-based LDMOS devices and robustness better than the square SOA (safe-operating-area). Fully isolated LDMOS devices, in which independent bias is capable for circuit flexibility, demonstrate superior specific on-resistance (e.g. 11.9 mΩ-mm 2 for breakdown voltage of 39 V). Moreover, the unusual sudden current enhancement appeared in the I D-V D saturation region of most of the high voltage LDMOS devices is significantly suppressed. ? 2012 IEEE. |
| Relation: | Proceedings of the International Symposium on Power Semiconductor Devices and ICs , art. no. 6229106 , pp. 401-404 |
| Appears in Collections: | [電機工程學系所] 會議論文
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