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Please use this identifier to cite or link to this item:
http://140.128.103.80:8080/handle/310901/9327
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Title: | 低功率霍夫曼編解碼器設計 |
Other Titles: | Low Power Huffman Codec Design |
Authors: | 蔡坤霖 Tsai, Kaun-Lin;Tsai, Shun-Hung |
Contributors: | 行政院國家科學委員會 東海大學電機工程學系(所) |
Keywords: | Huffman編解碼器;低功率;電路分割 Huffman codec;low power;circuit partition |
Date: | 2008 |
Issue Date: | 2011-06-16T06:34:04Z (UTC)
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Abstract: | 近幾??,因科技進步及人們生活方?的需求,可攜式影音產品越?越多,而其功能亦日?增加。然而,這?可攜式產品通常使用電池供電,使得使用時間受限於電池容?限制。因此具備低耗電設計的產品在此?裝置中?顯得相對重要。而在這?影音產品當中,JPEG及MP3是最常被使用的影像及聲音格式。Huffman編解碼過程則是影音壓縮及解壓縮當中一項相當重要的程序。其可將影像及聲音進?有效壓縮。由於Huffman編解碼器使用相當廣泛且JPEG的圖片或mp3聲音皆須經過Huffman編碼以達到其壓縮的目的,而被壓縮後的圖片或聲音亦需透過Huffman 解碼過程才能還原。因此,?要在嵌入式系統中達到?電的目的,設計一個低功?消耗的霍夫曼解碼器有其必要及重要性。在整個Huffman解碼器當中,查表區塊(Look-up table)佔有的面積最大,動作頻?最高,亦最耗電。故在此計畫當中,我們預計將look-up table進?有效?割,?用?同的訊號輸入位元,控制?同的查表區塊開關,讓?需要動作的電?處於靜止?態,?達到?低功?消耗的目的。我們主要的研究課題有三:一是提出一個有效的查表區塊分割演算法;二是設計Huffman編解碼器架構;三是改進整體架構的電功?消耗。此外,我們也將在?影響效能的考?下,設計此一霍夫曼解碼器出,並以FPGA進?實做驗證。我們相信此計畫之執?,將可為目前嵌入式影音系統設計提供一個?好且有效的低功?環境。 In recent years, more and more portable multimedia devices are developed in our daily life due to the technology progress and the requirement of human life. This kind of device often equipped with lots of functions, however, the portable devices are powered by battery, and the using time is limited by battery capacity. Due to this reason, low power design becomes an important issue. For multimedia devices, JPEG and MP3 are the common formats of image and sound, respectively. Since Huffman codec is widely used for data compression, and the JPEG images and MP3 music must compress and decompress by Huffman process, a low power Huffman codec is required for embedded system to achieve the power saving goal. In conventional Huffman codec circuits, the most area and power intensive portion is the Huffman look-up table block. In this project, we will partition the look-up table effectively, and reduce the power consumption by controlling the activity of the look-up tables. Our primary goals include (1) designing an effective look-up table partition algorithm, (2) designing a Huffman codec architecture, and (3) reducing total power consumption of the proposed Huffman codec. Besides, the low power Huffman codec will be designed with FPGA under performance constraint. We strongly believe this project is very timely and will deliver results of both theoretical and practical impact. The proposed method can also provide an effective low power architecture for embedded multimedia system. |
Relation: | 研究編號:NSC97-2218-E029-004 研究期間:2008-08~ 2009-07 |
Appears in Collections: | [電機工程學系所] 國科會研究報告
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Files in This Item:
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Size | Format | |
低功率霍夫曼編解碼器設計.PDF | | 592Kb | Adobe PDF | 576 | View/Open |
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