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    Please use this identifier to cite or link to this item: http://140.128.103.80:8080/handle/310901/21700


    Title: The device characteristics of partially undoped poly-silicon gate P-LDMOS power transistors
    Authors: Su, R.Y., Chiang, P.Y., Gong, J., Tsai, J.L., Huang, T.Y., Liu, M., Chou, C.C.
    Contributors: Department of Electrical Engineering, Tunghai University
    Keywords: Civil aviation;Electric network analysis;Electronics industry;Hot carriers;Integrated circuits;Leakage currents;MOS devices;MOSFET devices;Nonmetals;Polysilicon;Power electronics;Quality assurance;Reliability;Safety factor;Semiconducting silicon;Silicon;Standards;Sulfate minerals;Technical presentations;Transistors
    Date: 2008-07-07
    Issue Date: 2013-05-15T09:04:35Z (UTC)
    Publisher: Singapore; Singapore
    Abstract: The effect of partially undoped poly-silicon gate above the drift region in P-Lateral Double-Diffused MOS (P-LDMOS) Transistors is investigated. Experiment results show that it can improve the off-state leakage current and reduce the on-state resistance. For hot carrier performance, this structure induces a higher initial current shift due to less vertical field. The long-term hot carrier degradation behavior of this device is the same as that of the standard devices.
    Relation: Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA , art. no. 4588212
    Appears in Collections:[電機工程學系所] 會議論文

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