As the low-frequency noise of a transistor grows nonnegligible in advanced technologies, the possibility of using noise for computation is becoming an alternative, receiving more and more attention. The ability to control the noise level would further enrich the flexibility of the circuit design. Therefore, this letter presents a dual-gate field-effect transistor in an octagonal shape. By changing the voltage of an extra gate above the shallow trench isolation, the transistor is able to adapt its low-frequency noise over several decades and in a power-efficient manner. The octagonal geometry further makes sufficient a voltage range from 0 to 5 V for the noise adaptation. Moreover, the transistor is fabricated with the standard CMOS logic process without additional masks. All the features underpin the development of large-scale noisy computation in integrated circuits. ? 2010 IEEE.
Relation:
IEEE Electron Device Letters 32 (1) , art. no. 5654532 , pp. 9-11
